Exploring Top-Level Integration Options for Caravel User Projects

This article provides an overview of the various top-level integration strategies for the Caravel user project.

There are three main options to do top level integration for the caravel_user_project, we will dive in each option to show when it should be used to help you choose which option is the most suitable for you.

Option 1 - Macro-First Hardening:

In this approach, the user macro(s) are hardened first and then integrated into the user project wrapper without any top-level standard cells. This method is ideal for smaller designs as it significantly reduces the time required for Placement and Routing (PnR) and signoff.

In this setup, a single hardened macro is placed in the user's project wrapper with no logic at the top level, as seen here:

The following variables should be set on the user’s project wrapper configuration to achieve this implementation:

"SYNTH_ELABORATE_ONLY": 1,                             
"PL_RESIZER_DESIGN_OPTIMIZATIONS": 0,
"PL_RESIZER_TIMING_OPTIMIZATIONS": 0,
"GRT_RESIZER_DESIGN_OPTIMIZATIONS": 0,
"GRT_RESIZER_TIMING_OPTIMIZATIONS": 0,
"PL_RESIZER_BUFFER_INPUT_PORTS": 0,
"FP_PDN_ENABLE_RAILS": 0,
"GRT_REPAIR_ANTENNAS": 0,
"RUN_FILL_INSERTION": 0,
"RUN_TAP_DECAP_INSERTION": 0,

The following projects can be used as examples for this option:

Option 2 - Full-Wrapper Flattening:

This method involves merging the user macro(s) with the user_project_wrapper, utilizing the entire wrapper area. Though this approach requires more time and iterations for PnR and signoff, it enhances performance, making it suitable for designs that need the full wrapper area.

In this configuration, there are no separate macros, and all the logic is flattened into the top level, as seen here:

The following variables should be set on the user’s project wrapper configuration to achieve this implementation:

"SYNTH_ELABORATE_ONLY": 0,
"PL_RESIZER_DESIGN_OPTIMIZATIONS": 1,
"PL_RESIZER_TIMING_OPTIMIZATIONS": 1,
"GRT_RESIZER_DESIGN_OPTIMIZATIONS": 1,
"GRT_RESIZER_TIMING_OPTIMIZATIONS": 1,
"PL_RESIZER_BUFFER_INPUT_PORTS": 1,
"FP_PDN_ENABLE_RAILS": 1,
"GRT_REPAIR_ANTENNAS": 1,
"RUN_FILL_INSERTION": 1,
"RUN_TAP_DECAP_INSERTION": 1,

Option 3 - Top-Level Integration:

This strategy involves placing user macro(s) within the wrapper along with standard cells at the top level. It is typically chosen when buffering is needed at the top level, fitting scenarios where this approach is necessary.

In this setup, macros are hardened and placed at the top level, with additional logic present at this level as well, as shown here:

The following variables should be set on the user’s project wrapper configuration to achieve this implementation:

"SYNTH_ELABORATE_ONLY": 0,
"PL_RESIZER_DESIGN_OPTIMIZATIONS": 1,
"PL_RESIZER_TIMING_OPTIMIZATIONS": 1,
"GRT_RESIZER_DESIGN_OPTIMIZATIONS": 1,
"GRT_RESIZER_TIMING_OPTIMIZATIONS": 1,
"PL_RESIZER_BUFFER_INPUT_PORTS": 1,
"FP_PDN_ENABLE_RAILS": 1,
"GRT_REPAIR_ANTENNAS": 1,
"RUN_FILL_INSERTION": 1,
"RUN_TAP_DECAP_INSERTION": 1,

The following projects can be used as examples for this option: